高级计算机体系结构10存储器结构（英文）(ppt 41页)
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高级计算机体系结构10存储器结构（英文）内容提要：
3 Cs: Compulsory, Capacity, Conflict Misses
Reducing Miss Rate
1. Reduce Misses via Larger Block Size
2. Reduce Misses via Higher Associativity
3. Reducing Misses via Victim Cache
4. Reducing Misses via Pseudo-Associativity
5. Reducing Misses by HW Prefetching Instr, Data
6. Reducing Misses by SW Prefetching Data
7. Reducing Misses by Compiler Optimizations
Remember danger of concentrating on just one parameter when evaluating performance
Five techniques
Read priority over write on miss
Subblock placement
Early Restart and Critical Word First on miss
Non-blocking Caches (Hit under Miss, Miss under Miss)
Second Level Cache
Can be applied recursively to Multilevel Caches
Danger is that time to DRAM will grow with multiple levels in between
First attempts at L2 caches can make things worse, since increased worst case is worse
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