IBMPCAT硬件架构与动作原理(ppt 51页)(英文)

资料简介：

1. Range 00H~FFH : System board
2. Range 100~3FFH : I/O Channel
3. 00H~1FH : DMA Controller 1 Registers
4. 20H~3FH : Interrupt Controller 1 Register
5. 40H~5FH : Programmable Interrupt Timer
6. 60H~64H : keyboard Controller buffer
7. 70H : CMOS RAM address register port
8.   71H : CMOS RAM data register Port
9.   80H : Manufacturing Test Port
10. 81H~8FH : DMA page table address reg.
11. A0H~BFH : Programmable interrupt ctrl 2
12. C0H~DFH : DMA Controller 2 Register
13. F0H~FFH :  Math Coprocessor regs.
14. 170H~177H : Fixed disk 1 registers
15. 1F0H~1F7H : Fixed disk 0 registers
16. 200H~20FH : Game control port
17. 201H : Game Port I/O Data
18. 278H~27AH : Parallel Port 3 registers
19.2F8H~2FFH : Serial Port 2 registers
20. 370H~377H : Diskette Controller 1 reg
21. 378H~37AH : Parallel Port 2 registers
22. 3BCH~3BEH : Parallel Port 1 registers
23. 3F0H~3FFH : Diskette Controller 0 reg
24. 3F8H~3FFH : Serial Port 1 registers
25. 3C0H~3CFH : VGA I/O Port registers
Read/Write status
Bit 7 =1   Parity check
Bit 6 =1   Channel check
Bit 5 =1   Timer 2 output
Bit 4 =1   Toggle with each refresh request
Bit 3 =1   Channel check enabled
Bit 2 =1   Parity check enabled
Bit 1 =1   Speak data enabled
Bit 0 =1   Timer 2 gate to speaker enabled

 

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